1. Field of the Invention
The disclosure generally relates to a PLL (Phase Locked Loop) circuit, and more particularly, relates to a PLL circuit for avoiding the situation where a supply voltage of a VCO (Voltage-Controlled Oscillator) exceeds a predetermined value.
2. Description of the Related Art
A PLL circuit uses an oscillator having low frequency variation as reference. A variable-frequency component is driven by a feedback of a closed-loop control system to have the same fast and stable phase as that of the oscillator, i.e., for phase locked. When conducting phase locked, the PLL circuit can serve as a modulation circuit or a demodulation circuit in a communication system.
In a traditional PLL circuit, if a supply voltage of a ring oscillator exceeds a predetermined value, it will have a bad impact on performance of the PLL circuit. To solve the foregoing problem, there is a need to design a new PLL circuit for maintaining the supply voltage of the ring oscillator to within an acceptable range.